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PSA XS Evolution Interface Oscilloscope Screen Shots
28-05-2015, 08:46 AM,
Post: #1
PSA XS Evolution Interface Oscilloscope Screen Shots
Hi CT members,

Here are some of the oscilloscope signal screenshots (Tektronix TDS 2012C) for those who want to try
repair their EVO XS by understanding what they do ...!
This concerns the problems:
- No relay activation on electronic board of the same name,
- Failure to communicate on the vehicle computers,
Etc ...

[Image: img_1510.jpg]


The steering each relay is made with the two set of components: 8-bit serial-in, serial or parallel-out shift register with output
latches (HCT 595) + High Voltage, High Current Darlington Transistor Arrays (MC1413BDG or ULN2003).
The drivers are controlled by the PIC 16F684. To run this one in need of different signals
and various commands.

Description of ICP signals observed between the card and the Micro Relay:
- COM VPP control signal / 12Vdc supply to the input / MCLR of PIC
- COM VDD, control the 5Vdc power supply to the VDD input of PIC
- / CS, chip select signal PIC
- CLK signal of the clock of PIC
- SO, data signals for PIC

[Image: connec10.jpg]



Screenshot COM VPP Control signal and VDD control signal on a functional interface:

[Image: mesure10.jpg]

[Image: com_vd10.jpg]

COM VPP control signal/12VDC power goes from 0 to + 12Vdc of that connects the battery 12Vdc
on the relay card (jack connection on ODB).
COM VDD signal, it increases from 5Vdc to 0Vdc when the app is launched (I did the tests with lexia3 only)



During a diagnostic in GLOBAL TEST, that's what happens (warning on the screen of the oscilloscope, we see
signals of a non-functional interface):

[Image: mesure11.jpg]


Screenshot of clock signal CLK PIC on a functional interface:

[Image: clk_pi10.jpg]

The clock frequency is 6.45kHz.



Screenshot of clock signal CLK PIC on a non-functional interface:

[Image: mauvai10.jpg]

[Image: mauvai11.jpg]



Screenshot of clock signal CLK and /CS signal PIC on a functional interface:

[Image: mesure12.jpg]

[Image: cs_et_10.jpg]


Screenshot of clock signal CLK and /CS signal PIC on a non-functional interface:
Interface optocoupler 9871 A2 instead of 063N HCPL!

[Image: cm_opt10.jpg]

[Image: cs_et_11.jpg]


Screenshot of clock signal CLK and SO data signal PIC on a functional interface:

[Image: so_dat10.jpg]

[Image: data_e10.jpg]



Screenshot of clock signal CLK and SO data signal PIC on a non-functional interface:
Interface optocouplers 9871 A2 instead of HCPL 063N!

[Image: data_a10.jpg]

[Image: so_dat11.jpg]




Screenshot of /CS signal and SO data PIC signal on a functional interface:

[Image: cs_and10.jpg]


In Hoping that this will be educational for some of you!


Best Regards.
Reputation: +4 - racin-snake [+1] , violator [+1] , McMihai [+1] , HeXeN [+1]
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